Sebastian Raschka, PhD
Founder and Principal AI & LLM Research Engineer at RAIR Lab
About
I'm Sebastian Raschka, the Founder and Principal AI & LLM Research Engineer at RAIR Lab. My career has been a journey from academic research as a professor of statistics to hands-on engineering, where I focus on making complex AI architectures accessible and transparent. I am deeply passionate about the 'how' of Large Language Models—I believe that to truly understand a model, you have to build it from scratch. I've authored several books on machine learning and LLMs to help others bridge the gap between theory and implementation. I'm always looking to connect with fellow researchers and engineers who value open-source development, technical rigor, and the pursuit of efficient, high-performance AI systems.
Networking
What I can offer
- ›Deep-dive technical content and visual guides
- ›From-scratch code implementations of complex architectures
- ›Expertise in bridging academic research and industry implementation
Looking for
- ›expanding my professional network
- ›exploring mutual opportunities in AI research and open-source development
Best fit for
Current Interests
Background
Career
Transitioned from a PhD in statistical data mining to a tenure-track Assistant Professor of Statistics at UW-Madison, before moving into industry leadership roles at Lightning AI and founding RAIR Lab.
Education
PhD from Michigan State University (2012–2017); BSc from University of Düsseldorf (2008–2012).
Achievements
- ›Author of 'Build a Large Language Model (From Scratch)'
- ›Created the LLM Architecture Gallery and Ahead of AI magazine
- ›Tenure-track professor with significant academic publication record
- ›Delivered live-coding keynote at PyCon DE & PyData 2026
Opinions
- Code Doesn't Lie: true understanding comes from implementing architectures from scratch.
- Strong advocate for open-weight models and transparent, educational code.
- Skeptical of 'Arena' scores due to gaming and human style preference bias.
- Favors architectures that optimize for consumer hardware and real-world throughput.